Electrical circuits today function in many modes. Two of these modes are the ECL mode and the CMOS mode. A single substrate or chip will have only one of these modes, and when fast high density circuits are desired, the CMOS mode will be used because of its lower power consumption. However, a complex circuit or system may be designed so that signals from one mode interfaces with circuitry constructed using the other mode. This presents a problem in that the ECL on-off (1-0) states are represented by negative 0.95 volts and negative 1.71 volts, respectively. The CMOS standard on-off (1-0) states, however, are plus 5 volts and 0 volts, respectively. Thus, one problem that is immediately clear is that the CMOS circuit does not require and usually does not have negative voltage available.
A converter circuit, then, is necessary for signals which must pass between ECL and CMOS in either direction. Because of the extremely high speeds which are now being demanded, any such conversion circuit must be extremely fast acting and must not introduce any propagation times or errors into the circuitry. This is particularly difficult to achieve when it is remembered that the nominal electrical characteristics of this type of electrical circuitry are subject to temperature variations. Sometimes these variations are steep, and because of the relative slight difference between the 1 and 0 voltage states, these variations can cause significant errors if not compensated for properly.
A further problem exists in situations where, such as with the ECL and CMOS conversion, several standards exist. These standards deal with voltage levels as a function of temperature. Thus, in one situation, the conversion circuit must have one coefficient of voltage change, while with a different standard a different coefficient of change is necessary. For economy, it is desirable to use the same circuit component, to the extent possible, for different standards changing only the minimum necessary circuit element.
For example, in a CMOS circuit it is desired to create a circuit which accepts a signal from the CMOS core and which is zero to 5 volts typically for the off-on state and translates that signal to ECL levels on the output. It is further desired that the output levels be constant over temperature changes to supply voltages within certain tight specifications. It is further required that the translation circuit have very fast speeds through it which result in a fast propagation delay time from high to low or from low to high. It is further desired to operate from a zero and 5 volt power supply system only.
In the past, these types of circuits, where CMOS signals operated in ECL circuits, have been designed to work off of a negative supply system typically between zero to -5 volts.
Thus, there exists a need for a high speed CMOS to ECL conversion circuit built into a CMOS circuit which will accept the positive CMOS levels and feed those levels into the negative ECL signal levels, all at a very high transition speed and all without introduction of negative voltages onto the CMOS circuit.
A further need exists in the art for a CMOS to ECL conversion circuit having the above discussed characteristics while being utilized for several different temperature/voltage coefficient standards.